The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 14, 2000

Filed:

Feb. 12, 1998
Applicant:
Inventors:

Moon-han Park, Kyungki-do, KR;

Sug-hun Hong, Seoul, KR;

Yu-gyun Shin, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438424 ; 438435 ; 438692 ;
Abstract

A multilayer oxide film, including at least two oxide layers having differing stress characteristics, is used in a trench isolation method. Preferably, at least a first one of the oxide layers has tensile stress characteristics and at least a second one of the oxide layers has compressive stress characteristics. Thus, during densification, the overall stress can be reduced. The multilayer film is preferably formed by sequentially stacking first and second oxide films which have opposite stress characteristics. In one example, the first oxide film is a tetra-ethyl-orthosilicate (TEOS)-O.sub.3 based chemical vapor deposition (CVD) oxide film and the second oxide film is selected from the group consisting of TEOS-based plasma-enhanced CVD (PECVD) oxide film, an SiH.sub.4 based PECVD oxide film and a high density plasma (HDP) oxide film. In another embodiment, the first oxide film is an HDP oxide film and the second film is a TEOS-O.sub.3 based CVD oxide film. Accordingly, integrated circuits with reduced stress may be fabricated, thereby allowing increased performance of the integrated circuits.


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