The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2000

Filed:

Feb. 12, 1998
Applicant:
Inventors:

Yasunori Bito, Tokyo, JP;

Naotaka Iwata, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257192 ; 325194 ; 325195 ;
Abstract

In a method of manufacturing a semiconductor device, the InP substrate is subjected to a NH.sub.3 plasma processing by a plasma CVD apparatus into which NH.sub.3 gas is introduced. The InP oxide film is deoxided and removed therefrom and an InN (nitride) film is then formed thereon. S.sub.i H.sub.3 gas and NH.sub.3 gas are introduced into the plasma CVD apparatus to form a SiNx spacer layer on the InN (nitride) film. A source electrode and drain electrode are formed as ohmic electrodes. A Pt layer is stacked on the InP channel region by evaporation lift-off or ion beam sputter method to form a gate electrode. Thereafter, by a process similar to that of forming the SiNx/InN spacer layer, a SiNx/InN passivation film is formed on all over the InP substrate including the source electrode, the drain electrode, and the gate electrode. Accordingly, a semiconductor device protected by the passivation film is completed.


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