The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 1999

Filed:

Mar. 13, 1998
Applicant:
Inventors:

Jyh-Chyurn Guo, Chutung Hsinchu, TW;

W J Tsai, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518528 ; 36518518 ; 36518527 ;
Abstract

A new flash memory cell structure and operational bias approach for allowing programming operations significantly faster than prior approaches, is based on the use of band-to-band tunneling induced hot electron injection in cells to be programmed and on the use of triple-well floating gate memory structures. The method comprises inducing band-to-band tunneling current from the semiconductor body to one of the source and drain near the channel, and applying a positive bias voltage to the control gate to induce hot electron injection into the floating gate. The other of the source and drain terminals is floated, that is disconnected so that current does not flow through that terminal. The band-to-band tunneling current is induced by applying a reference potential to one of the source and drain sufficient to establish conditions for the band-to-band tunneling current. For example, a reference potential of approximately 0 volts is applied to the drain, and negative bias of about -4 volts to -8 volts is applied to the semiconductor body, and a positive voltage is applied to the control gate which falls in a range of about +6 volts to about +10 volts.


Find Patent Forward Citations

Guo, Jyh-Chyurn. (1999). Floating gate memory with substrate band-to-band tunneling induced hot (U.S. Patent No. 6009017). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6009017

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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