The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 1999
Filed:
Jun. 19, 1996
Syun-Ming Jang, Hsin-Chu, TW;
Lu-Min Liu, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method for forming upon a patterned layer within an integrated circuit an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer having a diminished pattern sensitivity. There is first provided a semiconductor substrate. Formed upon the semiconductor substrate is a patterned layer which provides a pattern sensitivity to an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer formed upon the patterned layer. The patterned layer is also susceptible to modification with a plasma which reduces the pattern sensitivity of the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer formed upon the patterned layer. The patterned layer is treated with the plasma. Finally, the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer is formed upon the patterned layer. Optionally, a conformal insulator layer may be formed upon the patterned layer prior to forming the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer upon the patterned layer. The conformal insulator layer may optionally be treated with a second plasma.