Method and system for simulating and making a phase lock loop circuit

Abstract

A method of making a phase lock loop circuit is disclosed. The method includes a method of simulating the phase lock loop circuit. The simulation runs on a system for making phase lock loop circuits. The simulation step initializes a reference frequency variable associated with a reference frequency of a phase lock loop circuit. The simulation method also initializes a voltage controlled oscillator (VCO) frequency variable associated with a VCO frequency of the phase lock loop circuit. A phase error is obtained from a frequency error between the reference frequency variable and the VCO frequency variable. The simulation method resets the phase error by a reset phase level when the phase error is approximately the same as a multiple of a reset threshold. When the frequency error changes sign, the phase error is permitted to also change sign. The simulation also determines a loop filter input for the phase lock loop circuit that depends upon the phase error and the frequency error. The simulation method provides a dramatic improvement in simulation time over conventional simulation methods.