Multiple thermal annealing method for a metal oxide semiconductor field

Abstract

A method for forming a metal oxide semiconductor field effect transistor (MOSFET). There is first provided a semiconductor substrate. There is then formed upon the semiconductor substrate a gate dielectric layer. There is then formed upon the gate dielectric layer a gate electrode. There is then implanted into the semiconductor substrate while employing the gate electrode as a mask a pair of unactivated source/drain regions at a pair of opposite edges of the gate electrode, where the gate dielectric layer, the gate electrode and the pair of unactivated source/drain regions form an unactivated metal oxide semiconductor field effect transistor (MOSFET). There is then annealed thermally through a first thermal annealing method the semiconductor substrate to form from the pair of unactivated source/drain regions a pair of activated source/drain regions, where the gate dielectric layer, the gate electrode and the pair of activated source/drain regions form an activated metal oxide semiconductor field effect transistor (MOSFET). Finally, there is then annealed thermally through a subsequent second thermal annealing method the semiconductor substrate to form from the activated metal oxide semiconductor field effect transistor (MOSFET) a hot carrier effect (HCE) resistant activated metal oxide semiconductor field effect transistor (MOSFET).