The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 1999

Filed:

May. 29, 1998
Applicant:
Inventors:

Behrooz Mehr, Palo Alto, CA (US);

Tony Kean-Lee Lim, Penang, MY;

Agnes Seok-Tuan Lim, Penang, MY;

Michael Barrow, El Dorado Hills, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
361777 ; 361774 ; 361760 ; 361772 ; 361783 ; 361779 ; 174260265- ; 22818021 ; 22818022 ; 257692 ; 257698 ; 257774 ; 257723 ; 257724 ; 257737 ; 257738 ;
Abstract

An electronics package includes a substrate, a via and a solder ball. The substrate has first and second opposed surfaces. The via is located within the substrate and terminates at the first surface. The via defines an opening having first and second opposed walls. The solder ball is at least partially located over the opening. The solder ball has first and second opposed sides, the first side being adjacent the first wall and the second side being adjacent the second wall. The first side is nearer to the first wall than the second side is to the second wall.


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