The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 1999
Filed:
Nov. 18, 1996
Salvador A Tostado, Elk Grove, CA (US);
George A Brathwaite, Union City, CA (US);
Paul R Hoffman, Modesto, CA (US);
George A Erfe, San Diego, CA (US);
Serafin P Pedron, Jr, Manteca, CA (US);
Michael A Raftery, Livermore, CA (US);
Kambhampati Ramakrishna, Manteca, CA (US);
German J Ramirez, Antioch, CA (US);
Linda E Strauman, Oakdale, CA (US);
Olin Corporation, Manteca, CA (US);
Abstract
A semiconductor package is provided that has a rigid metal substrate and a dielectric layer covering a first portion of the rigid metal substrate, with a second portion of the rigid metal substrate being substantially free of the dielectric layer. A semiconductor device is electrically bonded to the second portion of the rigid metal substrate and metal circuit traces defining electrical paths are formed on the dielectric layer, at least one of which contacts the rigid metal substrate through at least one via in the dielectric layer. Additionally, a method is provided for grounding a semiconductor device and at least one circuit trace on a rigid metal substrate substantially covered by a dielectric layer, which includes creating at least one via in the dielectric layer using a laser and creating circuit traces on the dielectric layer, at least one of which contacts the rigid metal substrate through at least one of the vias. The semiconductor is electrically bonded to the rigid metal substrate in an aperture in the dielectric layer.