Self-setup non-overlap clock generator

Abstract

A self-setup non-overlap clock generator is disclosed. This clock generator includes a primary clock signal input terminal for providing a primary clock signal, and a selection signal input terminal for providing at least one selection signal. The present invention also includes a first logic gate having a first input terminal coupled to receive an inverted signal of the primary clock signal. Further, a second logic gate is provided, having a first input terminal coupled to receive the primary clock signal. A first programmable delay portion is used to delay an output signal from the first logic gate an amount of time according to the selection signal, and a second programmable delay portion is used to delay an output signal from the second logic gate a predetermined amount of time according to the selection signal. Therefore, a first clock signal is generated from the output of the first logic gate, and a second clock signal is generated from the output of the second logic gate. Particularly, the present invention includes a test circuit to determine whether a non-overlap space between the first clock signal and the second clock signal conforms to a predetermined value. Finally, a selector is used to generate the at least one selection signal in response to at least one output of the test circuit such that a smallest value out of all possible non-overlap spaces is chosen.