The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 1999

Filed:

Jul. 11, 1995
Applicant:
Inventors:

Steve S Chiang, Saratoga, CA (US);

Wenn-Jei Chen, Sunnyvale, CA (US);

Assignee:

Actel Corporation, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438600 ; 438637 ; 438791 ;
Abstract

An antifuse fabrication process includes the steps of forming a lower antifuse electrode, forming an insulating layer over the lower antifuse electrode, forming an antifuse aperture in the insulating layer, forming a dielectric antifuse material including a first layer comprising silicon dioxide and a second layer comprising silicon nitride over the antifuse insulating layer, etching the silicon nitride layer to form a small layer of silicon nitride in a region centered over the antifuse aperture, optionally forming a third dielectric antifuse layer comprising silicon dioxide, and forming an upper antifuse electrode. Alternatively, the first, second, and third layers of dielectric antifuse material may be formed and then etched to form a small composite sandwich structure of silicon nitride and silicon dioxide over the first silicon dioxide layer in a region centered over the antifuse aperture prior to forming an upper antifuse electrode.


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