The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 1998

Filed:

Jul. 25, 1996
Applicant:
Inventor:

Carmen D Burns, Austin, TX (US);

Assignee:

Staktek Corporation, Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
438109 ; 438107 ;
Abstract

An ultra high-density integrated circuit module which includes a plurality of individual high-density integrated circuit packages. A plurality of the ultra high-density integrated circuit memory modules may be combined to form an ultra high-density memory bank for use in computers, or other applications requiring high-density on-board memory. The high-density integrated circuit packages which form the modules each have an internal lead frame and optional internal member which overlie an integrated circuit die. A thin, warp-resistant metal layer and an external heat conductor element are mounted to the exterior of the package. Heat is dissipated from the package while structural forces are selectively balanced.


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Burns, Carmen. (1998). Method of manufacturing an ultra-high density warp-resistant memory (U.S. Patent No. 5843807). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5843807

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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