The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 1998

Filed:

Jan. 21, 1997
Applicant:
Inventors:

Xiao-Yu Li, San Jose, CA (US);

Radu Barsan, Saratoga, CA (US);

Sunil Mehta, San Jose, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518528 ; 36518519 ;
Abstract

A method for improving the endurance and reliability of a floating gate transistor often used in memory applications by controlling the electric field induced across the tunnel oxide region of the floating gate when discharging electrons from the floating gate. The method comprises the steps of: allowing the active region to ground; and applying a program voltage to the floating gate over a period of time and at a magnitude, by increasing the voltage from zero volts to the magnitude over a first period of at least 1 millisecond (ms.), maintaining the voltage at the magnitude for a second period of around 10 ms.-100 ms. sufficient to place charge on the floating gate, and decreasing the voltage from the magnitude during a third period to zero volts in not greater than 50 microseconds.


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