The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 1998

Filed:

Dec. 19, 1995
Applicant:
Inventors:

Doron Orenstein, Halfa, IL;

Ofri Wechsler, Ramat Ishai, IL;

Millind Mittal, South San Francisco, CA (US);

Andrew F Glew, Hillsboro, OR (US);

Larry M Mennemeier, Boulder Creek, CA (US);

Alexander D Peleg, Haifa, IL;

David Bistry, Cupertino, CA (US);

Carole Dulong, Saratoga, CA (US);

Eiichi Kowashi, Ibaraki, JP;

Benny Eitan, Haifa, IL;

Derrick Lin, Foster City, CA (US);

Ramamohan R Vakkalagadda, Fremont, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395393 ; 395570 ; 39580023 ; 395591 ;
Abstract

A method and apparatus for executing different sets of instructions that cause a processor to perform different data type operations on different physical registers files that logically appear to software as a single aliased register file. According to one aspect of the invention, a processor is provided that includes at least two physical register files--one for executing scalar data type operations and the other for executing packed data type operations. In addition, the processor includes a transition unit that is configured to cause the two physical register files to logically appear to software executing on the processor as a single logical register file.


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