The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 1998

Filed:

Mar. 14, 1995
Applicant:
Inventors:

William H Shepherd, Palacitas, NM (US);

Steve S Chiang, Saratoga, CA (US);

John Y Xie, San Jose, CA (US);

Assignee:

Prolinx Labs Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257530 ; 257665 ;
Abstract

A novel antifuse includes a composite of conductive particles dispersed throughout a nonconductive matrix, which composite is located inside an antifuse via. The antifuse via is defined by a dielectric layer that separates two electrodes. The electrodes can be located in the same conductive layer plane (typically parallel to and isolated from one another) or in two different conductive planes (typically formed transverse to one another and separated by a dielectric with an antifuse via formed therein). The electrodes can be coupled to, for example, active or passive regions of the integrated circuit. One embodiment of an antifuse (also called 'composite antifuse') has only the composite in an antifuse via between the two conductive layers. Another embodiment of an antifuse (also called 'hybrid antifuse') includes in addition to the composite, one or more thin dielectric layers also located in the antifuse via between the two conductive layers.


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