The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 27, 1998
Filed:
May. 02, 1997
Rashid Bashir, Santa Clara, CA (US);
Francois Hebert, San Mateo, CA (US);
Datong Chen, Fremont, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A buried interconnect structure which is stable at the high temperatures involved in BiCMOS, bipolar, and CMOS transistor process flows, and a method of making the same. The interconnect structure is fully insulated and can be used to form stable, doped structures suitable for use as electrodes and gate structures in a CMOS process, or to form low resistance contacts to N or P-type silicon as part of a bipolar process. Because the interconnect structure is buried and fully insulated from surrounding structures, it may be used to form complex, multi-level devices having a minimized geometry and increased circuit density.