Register alias table update to indicate architecturally visible state

Abstract

A mechanism for indicating within a register alias table (RAT) that certain data has become architecturally visible so that the RAT contains the most recent location of the certain data. Upon receiving the indication that data associated with a particular register is architecturally visible, if a subsequent operation uses the particular register as a source, the data will be supplied from the architecturally visible buffer instead of from an internal buffer (not architecturally visible). The internal buffer is implemented by a reorder buffer (ROB) which contains information associated with instructions that have not yet retired. The architecturally visible buffer is a retirement register file (RRF) which contains information associated with retired instructions. When an instruction retires, the register alias table is searched for the retiring physical register and will indicate within the register alias table that the data associated with the retiring physical register is located within the RRF only if the register alias table has not already (or concurrently) reassigned a new physical register to the logical register associated with the retiring physical register. If the logical register associated with the retiring physical register as been reassigned by subsequent instructions, then no update of the register alias table is required. Also provided is an embodiment for providing the above features in a system wherein the register ordering of the buffers can be altered via register exchange operations.