The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 1998
Filed:
Feb. 04, 1997
Khalid EzzEldin Ismail, White Plains, NY (US);
Bernard S Meyerson, Yorktown Heights, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A dual transistor CMOS inverter can be built wherein a single gate is shared by two MOS transistors but only one transistor can be turned on at a time. A CMOS inverter function is provided. Further, a dual transistor logic function is described incorporating a combination of a lateral bipolar transistor (LBT) and a metal-oxide-semiconductor transistor (MOST). The gate of the MOST is used to turn on and off the base of the LBT. When the base is turned on, the LBT is turned on and off depending on the base voltage. This device has, thus, two inputs and can perform logic functions such as OR or NAND, which would typically require four transistors. The invention solves the problem of device density to perform logic by forming stacked devices with shared electrodes.