The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 1998
Filed:
Mar. 26, 1996
Qing Zhu, Fremont, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method and apparatus for routing a clock tree in an integrated circuit device. Prior art clock trees were routed entirely on an integrated circuit device, thereby increasing the size, complexity, and cost of the integrated circuit. The present invention provides for a design wherein the clock tree is partitioned into one or more local clock trees and a global clock tree. A local clock tree is defined as a cluster of clock sinks coupled together. The global clock tree is defined as the interconnect between the local clock tree and the clock source. The local clock tree is routed on a device layer of the integrated circuit. The global clock tree is routed on a package layer of the integrated circuit package. The package layer is coupled to the device layer through a plurality of contacts.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile