The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 1997
Filed:
Dec. 19, 1995
Andrew F Glew, Hillsboro, OR (US);
Larry M Mennemeier, Boulder Creek, CA (US);
Alexander D Peleg, Haifa, IL;
David Bistry, Cupertino, CA (US);
Millind Mittal, South San Francisco, CA (US);
Carole Dulong, Saratoga, CA (US);
Eiichi Kowashi, Ibaraki, JP;
Benny Eitan, Haifa, IL;
Derrick Lin, Foster City, CA (US);
Ramamohan R Vakkalagadda, Fremont, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method for executing different sets of instructions that cause a processor to perform different data type operations in a manner that is invisible to various operating system techniques, that promotes good programming practices, and that is invisible to existing software conventions. According to one aspect of the invention, a data processing apparatus executes a first set of instructions of a first instruction type on what at least logically appears to software as a single logical register file. While the data processing apparatus is executing the first set of instructions, the single logical register file appears to be operated as a flat register file. In addition, the data processing apparatus executes a first instruction of a second instruction type using the logical register file. However, while the data processing apparatus is executing the first instruction, the logical register file appears to be operated as a stack referenced register file. Furthermore, the data processing apparatus alters all tags in a set of tags corresponding to the single logical register file to a non-empty state sometime between starting the execution of the first set of instructions and completing the execution of the first instruction. The tags identifying whether registers in the single logical register file are empty or non-empty.