The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 1997

Filed:

Jan. 11, 1996
Applicant:
Inventors:

Ahmad Hamzehdoost, Sacramento, CA (US);

Leonard Lucio Mora, San Jose, CA (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
29832 ;
Abstract

A package for an integrated-circuit includes a package body having a die-cavity formed therein. A die-attach pad is formed in the package body adjacent the die-cavity. An opening is formed in the central portion of the die-attach pad for exposing one side of the integrated-circuit die so that an external cooling media can directly contact the exposed side of the integrated-circuit die. The die-attach pad can be formed as a die-mounting ring adjacent the die-attach cavity. The peripheral edge of the integrated-circuit die is fixed to a mounting surface on the die-mounting ring portion to accommodate direct cooling of the exposed side of the integrated-circuit die. The mounting surface of the die-mounting ring extends beyond the peripheral edge of the integrated-circuit die to accommodate a range of sizes of the integrated-circuit die. The exposed surface of the integrated circuit die is cooled, for example, with a cooling fluid, a heatsink, or a thermo-electric refrigeration unit in contact with the exposed side of the die. The exposed side of the die is coated with a film to provide a seal for the exposed side of the integrated-circuit die.


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