The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 1997
Filed:
May. 04, 1995
Vivek Jain, Milpitas, CA (US);
Dipankar Pramanik, Cupertino, CA (US);
Subhash R Nariani, San Jose, CA (US);
Kuang-Yeh Chang, Los Gatos, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
The invention relates to MOS devices and methods for fabricating MOS devices having multilayer metallization. In accordance with preferred embodiments, internal passivation is used for suppressing device degradation from internal sources. Preferred devices and methods for fabricating such devices include formation of one or more oxide layers which are enriched with silicon to provide such an internal passivation and improve hot carrier lifetime. Preferred methods for fabricating MOS devices having multi-level metallization include modifying the composition of a PECVD oxide film and, in some embodiments, the location and thickness of such an oxide. In an exemplary preferred embodiment, PECVD oxide layers are modified by changing a composition to a silicon enriched oxide.