The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 1996
Filed:
Jun. 06, 1995
Kam Law, Union City, CA (US);
Robert Robertson, Palo Alto, CA (US);
Guofu J Feng, San Jose, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
A method of depositing layers of intrinsic amorphous silicon and doped amorphous silicon sequentially on a substrate in the same CVD chamber without incurring a dopant contamination problem. The method can be carried out by first depositing an additional layer of a dielectric insulating material prior to the deposition process of the intrinsic amorphous silicon layer. The additional layer of insulating material deposited on the substrate should have a thickness such that residual insulating material coated on the chamber walls is sufficient to cover the residual dopants on the chamber walls left by the deposition process of the previous substrate. This provides a clean environment for the next deposition process of an intrinsic amorphous silicon layer on a substrate in the same CVD chamber.