The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 17, 1996
Filed:
Aug. 03, 1994
Kouichi Tanaka, Nishigo-mura, JP;
Hiromasa Hashimoto, Nishigo-mura, JP;
Fumio Suzuki, Taishin-mura, JP;
Shin-Etsu Handotai Co., Ltd., , JP;
Abstract
A method of polishing semiconductor wafers and apparatus therefore are described. According to the present invention, a semiconductor wafer mounted on the lower side of a wafer mounting plate may be polished on a polishing pad by the front referenced polishing technique due to a flexibility of the wafer mounting plate to make the same to conform in detail with the backside contour of the wafer under polishing pressure and a selected flexibility differential between a wafer holding region and the outer moving region of the wafer mounting plate. An apparatus includes the wafer mounting plate that also works as a vacuum chuck plate is constructed out of a flexible thin disc of hard plastics, a central round region is used for a wafer holding region facing the backside of the wafer and the outside annular region is more flexible to work as a moving region, a pan-shaped rubber sheet is secured to a ring projection, the wafer mounting disc is adhered to the inner periphery of the rubber sheet at and along the periphery thereof to generate a sealed space, passes for vacuum communication and for a compressed air supply are formed through a rotary shaft, and vacuum chuck holes are communicated with the vacuum pass and the compressed air pass is in communication with a sealed space in the wafer holder.