The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 1996

Filed:

Oct. 24, 1994
Applicant:
Inventors:

Dror Avnon, Milpitas, CA (US);

Harshvardhan P Sharangpani, Santa Clara, CA (US);

Jonathan B Sweedler, Sunnyvale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395375 ; 364748 ; 395733 ; 395800 ;
Abstract

A method and apparatus for executing floating-point instruction pairs in a pipelined manner in which exceptions are predicted during an execution stage. In response to a possible exception, the execution pipeline can stall the pipeline. The floating-point pipeline and the integer pipelines are stalled in an execution stage and a decoding stage, respectively. Once stalled, the floating-point microinstructions are executed, the state of the machine is updated and then any exceptions are reported.


Find Patent Forward Citations

Avnon, Dror. (1996). Method and apparatus for executing floating point (fp) instruction pairs (U.S. Patent No. 5559977). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5559977

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…