The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 1996

Filed:

Aug. 03, 1995
Applicant:
Inventors:

Yen-Long Chiu, Hsin-chu, TW;

Kuo-Chin Hsu, Hsin-chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 48 ; 437 34 ; 437 44 ;
Abstract

A CMOS Mask ROM semiconductor device is formed in P-well NMOS region of a silicon semiconductor substrate with FOX regions on the surface thereof. A method of forming the device includes forming gate oxide over the substrate between FOX regions; forming a control gate layer over the gate oxide. Then form a gate mask over the device with and pattern a gate electrode and the gate oxide layer by etching through mask openings. Next, form an LDD mask over the device exposing the gate. Ion implant a P type dopant of a first dosage level through mask openings forming reverse type LDD implant doped P type regions. Form spacers adjacent to the electrode over the substrate. Ion implant an N type dopant of a second dosage level through the opening in the mask and aside from the spacers and the electrode into exposed portions of the substrate. The N type doped regions are thus self-aligned with the spacers and the gate and they provide a second dosage level in the substrate, the second dosage level being substantially different from the first dosage level.


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