The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 1996

Filed:

Jul. 09, 1993
Applicant:
Inventors:

Rhea Posedel, Belmount, CA (US);

Larry Lape, Mt. View, CA (US);

James Wrenn, Palo Alto, CA (US);

Assignee:

AEHR Test Systems, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324755 ; 324761 ; 324760 ; 324765 ; 439 73 ; 439 71 ; 439 66 ; 439 67 ;
Abstract

A reusable carrier (10) for temporarily holding an integrated circuit (12) during burn-in and electrical test includes a base (14) and a lid (16) attached to the base (14) by hinges (18). A flexible substrate (19) is attached to the base (14) with a suitable adhesive. Alignment posts (20) have tapered surfaces (22) that engage corners (24) of the integrated circuit (12) to position the integrated circuit (12) precisely on upper surface (26) of the substrate (19). A spring-loaded latch (28) engages projection (30) in aperture (32) of the base (14) to hold the lid (16) closed over the integrated circuit (12). Electrically conductive traces (34) on the surface (26) have contact bumps which engage contact pads on the underside of the circuit (12) to connect the integrated circuit (12) to peripheral contact pads (38) around edges (40) of the substrate (19). A spring (42) engages upper surface (43) of the circuit (12) when the lid (16) is in its closed position over the integrated circuit (12), to provide a biasing force to urge the contact pads against the conductive traces (34) with sufficient force to insure a reliable electrical connection. For burn-in, the temporary package (10) containing the integrated circuit die (12) is now loaded into a socket (48) on a burn-in board (50), which is then loaded into a burn-in system, where otherwise standard burn-in is performed.


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