The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 1996

Filed:

Oct. 12, 1993
Applicant:
Inventors:

Michael C Smayling, Missouri City, TX (US);

Iano D'Arrigo, Cannes, FR;

Giovanni Santin, Rufina, IT;

Georges Falessi, La Gaude, FR;

Mousumi Bhat, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518527 ; 36518516 ; 36518506 ;
Abstract

A non-volatile memory cell 10 is disclosed herein. The cell is formed in a first semiconductor region 12 of a first conductivity type. A second semiconductor region 14 of a second conductivity type formed over the first semiconductor region 12. A third semiconductor region 16 of the first conductivity type formed over the second semiconductor region 14. In the preferred embodiment, the second and third regions 14 and 16 are well regions formed within the first region 12. Other regions such as epitaxially grown layers can also be used. First and second source/drain regions 18 and 20 are formed within the third semiconductor region 16. These second source/drain regions 18 and 20 are separated by a channel region 22. A floating gate 26 overlies at least a portion of the channel region 22 while a control gate 30 overlies the floating gate 26.


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