The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 1996

Filed:

Apr. 28, 1995
Applicant:
Inventors:

Trung T Doan, Boise, ID (US);

Malcolm Grief, Boise, ID (US);

Laurence D Schultz, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
1566361 ; 437228 ;
Abstract

A method of chemically-mechanically planarizing (CMP) a dielectric layer formed on semiconductor wafer includes planarizing the dielectric layer with a polishing pad formed of a hard low compressibility pad material, and then polishing the dielectric layer with a polishing pad formed of a soft compressible pad material to remove micro-scratches formed during the planarization step. During the planarization step, the hard low compressibility pad material does not deform into the surface of the dielectric layer and the dielectric layer is planarized along a single contact plane. A loading effect in which the a material compresses and produces an irregular surface is thus eliminated.


Find Patent Forward Citations

Doan, Trung. (1996). Method for chemical planarization (cmp) of a semiconductor wafer to (U.S. Patent No. 5514245). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5514245

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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