Process for post metal coding of a rom, by gate etch

Abstract

A method, and resultant structure, for manufacturing ROM (Read Only Memory) integrated circuits that may be coded, or programmed, after metallization, is described. A plurality of parallel bit lines is formed in a semiconductor substrate. There is a thin insulating layer over the substrate. A plurality of parallel word lines is formed over the thin insulating layer, arranged orthogonally to the bit lines. Gate electrodes of a single conductive material are in coded regions under the word lines, over the thin insulating layer, and between the bit lines, where a ROM code etch has been performed, such that there is a gap between the single conductive material and the word lines. The ROM code etch is performed by an RCA etch of titanium or titanium nitride previously formed between the single conductive material and the word lines. Gate electrodes of two layers of conductive material are in uncoded regions connected to and under the word lines, over the thin insulating layer, and between the bit lines.