Method of forming an esd and hot carrier resistant integrated circuit

Abstract

An integrated circuit device including a substrate, a gate structure formed over the substrate, a channel formed in the substrate under the gate, a lightly-doped drain-side LDD region formed in the substrate adjacent to a drain-side of the channel (preferably by a LATID process), a drain region formed in the substrate near to the drain-side LDD region, and a drain-side DDD region substantially separating the drain-side LDD region from the drain region. Preferably, the integrated circuit device is symmetrically formed such that a lightly-doped source-side LDD region is formed in the substrate adjacent to a source-side of the channel (again preferably by a LATID process), a source region is formed in the substrate near to the source-side LDD region, and a source-side DDD region is formed in the substrate to substantially separate the source-side LDD region from the source region. Further preferably, the DDD regions substantially isolate the source and drain from a bulk portion of the substrate. A method of the present invention includes the steps of providing a semiconductor substrate, forming a gate over the substrate to define a channel, doping the substrate to form a pair of LDD regions in the substrate, doping the region to form a drain region and a source region, and doping the substrate to form a drain-side DDD region in the substrate which substantially separates the drain region from a drain-side LDD region and which substantially isolates the drain region from a bulk portion of the substrate, and to form a source-side DDD region in the substrate which substantially separates the source region from a source-side LDD region and substantially isolates the source region from a bulk portion of the substrate.