The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 1996

Filed:

Mar. 07, 1994
Applicant:
Inventors:

Yoshifumi Tomomatsu, Fukuoka, JP;

Hiroshi Yamaguchi, Fukuoka, JP;

Hiroyasu Hagino, Fukuoka, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257139 ; 257341 ;
Abstract

In an insulated gate semiconductor device, a loss is suppressed and a short-circuit tolerance as well as a latch-up tolerance are improved. A saturation current I.sub.CE (sat) and a short-circuit tolerance tw are reduced without much influencing a collector-emitter saturation voltage V.sub.CE (sat) by setting a sheet resistance of an n-type emitter region 4 at a large value. When the sheet resistance is in the range between 40.OMEGA./.quadrature. and 150.OMEGA./.quadrature., 10 .mu.sec or more of the short-circuit tolerance, which is practically sufficient, is ensured while the collector-emitter saturation voltage V.sub.CE (sat) is suppressed to practically small 2.4 V or less. Both the collector-emitter saturation voltage V.sub.CE (sat) and the saturation current I.sub.CE (sat) are restrained small, thereby realizing an enhanced short-circuit tolerance.


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