The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 1996
Filed:
Oct. 29, 1993
Applicant:
Inventors:
Assignee:
Kawasaki Steel Corporation, Hyogo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437192 ; 437194 ; 437195 ;
Abstract
A method of forming a via structure having good characteristics in a semiconductor device having a multilayered wiring structure includes forming a thin film including a high melting point metal or a high melting point metal compound on at least the side wall of a via hole before a via plug including Al or an Al alloy is formed.
Quick Actions:
Yamamoto, Hiroshi. (1996). Method of forming multilayered wiring structure in semiconductor device (U.S. Patent No. 5486492). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5486492
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile