The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 1995
Filed:
Nov. 08, 1993
Yasutomo Fujiyama, Atsugi, JP;
Mitsuhiro Ishii, Fujisawa, JP;
Senju Kanbe, Kawasaki, JP;
Takao Yonehara, Atsugi, JP;
Toru Takisawa, Atsugi, JP;
Akira Okita, Ayase, JP;
Kiyofumi Sakaguchi, Atsugi, JP;
Takanori Watanabe, Atsugi, JP;
Kazuo Kokumai, Atsugi, JP;
Canon Kabushiki Kaisha, Tokyo, JP;
Abstract
An anodization apparatus for anodizing the surface of a semiconductor substrate by supporting the semiconductor substrate between a pair of electrodes in an electrolytic solution and applying a voltage across the pair of electrodes. The anodization apparatus includes an elastic sealing member for supporting a peripheral portion of the semiconductor substrate such that a surface portion of a semiconductor substrate remains exposed, a support jig which includes a tapered hollow portion for supporting the sealing member, and a device for introducing a fluid of gas or liquid into the tapered hollow portion. When the fluid is introduced, the sealing member is pressed against and brought into hermetic contact with the tapered hollow portion and with the entire peripheral portion of the semiconductor substrate such that the electrolytic solution is separated into electrically isolated parts by coordination between the semiconductor substrate, the sealing member, and the support jig. Anodization of the semiconductor substrate may then be carried out, such as by producing a porous silicon layer on the surface of the semiconductor substrate.