The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 12, 1995
Filed:
Jul. 07, 1993
Wenn-Jei Chen, Sunnyvale, CA (US);
Steve S Chiang, Saratoga, CA (US);
Esam Elashmawi, San Jose, CA (US);
Actel Corporation, Sunnyvale, CA (US);
Abstract
A 'read-disturb' resistant metal-to-metal antifuse includes a lower electrode comprising a first metal layer in a microcircuit structure. An inter-metal dielectric is disposed over the lower electrode and includes an antifuse aperture disposed therein. A first layer of antifuse material is disposed over exposed surface of the lower electrode in the antifuse aperture. A highly conductive layer is disposed over the first region of antifuse material and a second layer of antifuse material is disposed over the highly conductive layer. An upper electrode comprises a second metal layer disposed over the second layer of antifuse material. The first and second layers of antifuse material may comprise single-layer or multi-layer dielectric materials, amorphous silicon, or combinations of these materials. A process for fabricating a read-disturb resistant metal-to-metal antifuse comprises the steps of forming a lower electrode comprising a portion of a first metal layer in a microcircuit structure; forming an inter-metal dielectric layer over the lower electrode; forming an antifuse aperture in the inter-metal dielectric layer to expose the upper surface of the lower electrode; forming a first layer of antifuse material over the exposed surface of the lower electrode in the antifuse aperture; forming a highly conductive layer over the first layer of antifuse material; forming a second layer of antifuse material over the highly conductive layer; and forming an upper electrode comprising a second metal layer over the second layer of antifuse material.