Method enhancing planarization etchback margin, reliability, and

Abstract

Void-free planarization of sub-micron and deep sub-micron semiconductor devices results from depositing a layer of silicon-enriched oxide over a conventionally fabricated device and its metal traces. Conventional layers of TEOS-based oxide and SOG are then applied over the layer of silicon-enriched oxide. The silicon-enriched oxide has an index of refraction of at least about 1.50, a dangling bond density of about 10.sup.17 /cm.sup.3, and is typically about 1,000 .ANG. to 2,000 .ANG. thick. Because it is relatively deficient in oxygen atoms, the silicon-enriched oxide releases relatively few oxygen atoms when exposed by the etching process and does not greatly accelerate the SOG etch rate. Further, the silicon-enriched oxide itself has an etch rate that is only about 75% that of stoichiometric TEOS-based oxide. As such, the silicon-enriched oxide acts as a buffer that slows the etch-back process as the etching approaches the level of the metal traces, thus protecting the metal traces against exposure. In addition, the silicon-enriched oxide advantageously promotes stability and reliability of the underlying device. The silicon-enriched performs an shield-like function by neutralizing charges that could influence the underlying semiconductor device. In practice, the silicon-enriched oxide can extend hot carrier lifetime by about one order of magnitude.