The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 1994

Filed:

Jul. 22, 1992
Applicant:
Inventors:

Ahmad Hamzehdoost, Sacramento, CA (US);

Chin-Ching Huang, San Jose, CA (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
174 524 ; 29832 ;
Abstract

A package assembly for an integrated circuit die includes a base having a cavity formed therein for receiving an integrated circuit die. The base has a ground-reference conductor. A number of bonding wires are each connected between respective die-bonding pads on the integrated circuit die and corresponding bonding pads formed on the base. The lid has an electrically conductive layer formed on it to cover the integrated circuit die in the cavity formed in the base. The electrically conductive layer formed on the lid is positioned in close proximity to some of the plurality of bonding wires. The electrically conductive layer formed on the lid is connected to the ground-reference conductor of the base. This arrangement reduces both the self-inductances of the one or more conductors and the mutual inductance between the one or more conductors. With this arrangement the electrically conductive layer formed on the lid is grounded to reduce interference being radiated from the electrically conductive layer.


Find Patent Forward Citations

Loading…