The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 1994

Filed:

Jun. 09, 1992
Applicant:
Inventors:

Masataka Minami, Hachioji, JP;

Mitsuru Hiraki, Hachioji, JP;

Kazuo Yano, Hino, JP;

Atsuo Watanabe, Hitachiota, JP;

Kouichi Seki, Hino, JP;

Takahiro Nagano, Hitachi, JP;

Kazushige Sato, Ome, JP;

Keiichi Yoshizumi, Kokubungi, JP;

Ryuichi Izawa, Kokubungi, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 35 ; 437 26 ; 437 27 ; 437 32 ; 437 31 ; 437 34 ; 437 59 ; 437 76 ;
Abstract

A novel gate circuit is disclosed. A first semiconductor switch includes a couple of main terminals connected between a first potential level and an output node, in which a high impedance state is held in response to an input signal having a first logic level and a second logic level, and the impedance state changes from high to low only during a transient period when the input signal changes substantially from the first to second logic level. A second semiconductor switch includes a couple of main terminals inserted between a second potential level different from the first potential level and the output node, in which a high impedance state is held in response to the input signal, and the impedance state changes from high to low only during a transient period when the input signal changes from the second to first logic level.


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