The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 1994
Filed:
Jan. 07, 1992
Iwona Turlik, Raleigh, NC (US);
Arnold Reisman, Raleigh, NC (US);
Deepak Nayak, Los Angeles, CA (US);
Lih-Tyng Hwang, Durham, NC (US);
Giora Dishon, Jerusalem, IL;
Scott L Jacobs, Apex, NC (US);
Robert F Darveaux, Raleigh, NC (US);
Neil M Poley, Cary, NC (US);
MCNC, Research Triangle Park, NC (US);
IBM Corporation, Armonk, NY (US);
Northern Telecom Limited, Montreal, CA;
Abstract
A high performance integrated circuit chip package includes a support substrate having conductors extending from one face to the opposite face thereof and a multilayer wiring substrate on the opposite face of the support substrate for connecting chips mounted thereon to one another and to the conductors. A heat sink includes microchannels at one face thereof, with thermally conductive cushions connecting the one face of the heat sink with the exposed back sides of the chips, to provide a high density chip package with high heat dissipation. The support substrate and heat sink may be formed of blocks of material having thermal expansion matching silicon. The cushions are a low melting point solder, preferably pure indium, and are sufficiently thick to absorb thermal stresses, but sufficiently thin to efficiently conduct heat from the chips to the heat sink.