The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 21, 1994
Filed:
May. 20, 1993
Joseph G Ameen, Apalachin, NY (US);
Joseph Funari, Vestal, NY (US);
David W Sissenstein, Jr, Endwell, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An electronic package which includes a rigid first substrate (e.g., ceramic) having a plurality of conductive pins spacedly located therein. These pins each include one end portion extending below an undersurface of the substrate for positioning and electrically coupling within a second substrate (e.g., printed circuit board), while also including an opposite end portion which projects from an opposite, upper surface of the first substrate. These upwardly projecting end portions are designed for accommodating, in stacked orientation, a plurality of thin film, flexible circuitized substrates thereon, each of these substrates being electrically coupled to a respective pin, if desired, using a solder composition. In one example of the invention, solder hierarchy for various solders is used, one solder being used to connect the substrates and respective pins, and a second solder (having a higher melting point and different composition from the first solder) used to connect the semiconductor devices (chips) of the flexible circuitized substrates to the conductive circuitry of the substrates. Hydrogen is preferably used to effect solder reflow for the solder which couples the flexible substrates to the respective pins. In an alternate embodiment, the flexible circuitized substrates may include at least two separate conductive layers as part thereof.