The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 31, 1994
Filed:
Aug. 12, 1992
Sze-Hon Kwan, San Francisco, CA (US);
Fwu-Iuan Hshieh, San Jose, CA (US);
Mike F Chang, Cupertino, CA (US);
Yueh-Se Ho, Sunnyvale, CA (US);
King Owyang, Atherton, CA (US);
Siliconix, Incorporated, Santa Clara, CA (US);
Abstract
A trenched DMOS transistor is fabricated using six masking steps. One masking step defines both the P+ regions and the active portions of the transistor which are masked using a LOCOS process. The LOCOS process also eliminates the poly stringer problem present in prior art structures by reducing the oxide step height. A transistor termination structure includes several field rings, each set of adjacent field rings separated by an insulated trench, thus allowing the field rings to be spaced very close together. The field rings and trenches are fabricated in the same steps as are corresponding portions of the active transistor.