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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 5308796 B1

PDFFull Text
Date of Patent:
May. 03, 1994

Filed:

Apr. 27, 1993

Fabrication of electronic devices by electroless plating of copper onto

Applicant:
Inventors:

Leonard C Feldman, Berkeley Heights, NJ (US);

Gregg S Higashi, Basking Ridge, NJ (US);

Cecilia Y Mak, Bedminster, NJ (US);

Barry Miller, Murray Hill, NJ (US);

Assignee:

AT&T Bell Laboratories, Murray Hill, NJ (US);

Attorneys:

Botos; Richard J.

Schneider; Bruce S.

Primary Examiner:

John S Maples

Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437200 ; 437230 ; 427 98 ;
Abstract

It has been found that selective metallization in integrated circuits is expeditiously achieved through a copper plating procedure. In this process, palladium silicide is used as a catalytic surface and an electroless plating bath is employed to introduce copper plating only in regions where the silicide is present. Use of this procedure yields superior filling of vias and windows with excellent conductivity.

Find Patent Forward Citations

Feldman, Leonard. (1994). Fabrication of electronic devices by electroless plating of copper onto (U.S. Patent No. 5308796). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5308796

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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