The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 1994

Filed:

Nov. 25, 1992
Applicant:
Inventor:

Francois Hebert, Sunnyvale, CA (US);

Assignee:

Avantek, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437 31 ; 437 59 ; 148D / ;
Abstract

A self-aligned fully-walled monocrystalline silicon emitter-base structure for a bipolar transistor and methods for producing the structure are provided. The methods involve creating an oxide side wall surrounding a monocrystalline silicon emitter-base structure by first defining the emitter region in a base island region. Successive oxide layers are deposited on top of the emitter region and etched back to produce an oxide wall around the entire perimeter of the emitter region. In a preferred embodiment of the invention a metal silicide is also formed across the top of the base island region of the semiconductor outside of the emitter region. Since the extrinsic base region, outside of the oxide sidewalls, is entirely covered by a low resistance silicide film, the base contact area can be significantly reduced compared to prior art devices. The process results in a fully-walled emitter-base structure made of monocrystalline silicon which exhibits improved high-frequency performance. The peripheral emitter-base capacitance is substantially decreased by the oxide walls which surround the emitter sides. Since the sides of the emitter are walled, no lateral current injection can occur. Bipolar transistors which employ the claimed process exhibit an increased emitter-base breakdown and a reduced forward tunneling current since high sidewall doping levels are eliminated.


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