The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 1993

Filed:

Aug. 31, 1992
Applicant:
Inventors:

Birendra N Agarwala, Hopewell Junction, NY (US);

Madhav Datta, Yorktown Heights, NY (US);

Richard E Gegenwarth, Poughkeepsie, NY (US);

Christopher V Jahnes, Monsey, NY (US);

Patrick M Miller, Poughkeepsie, NY (US);

Henry A Nye, III, Danbury, CT (US);

Jeffrey F Roeder, Brookfield, CT (US);

Michael A Russak, Brewster, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B44C / ;
U.S. Cl.
CPC ...
156664 ; 156634 ; 156656 ; 156666 ; 437183 ; 437192 ;
Abstract

Etching processes are disclosed for producing a graded or stepped edge profile in a contact pad formed between a chip passivating layer and a solder bump. The stepped edge profile reduces edge stress that tends to cause cracking in the underlying passivating layer. The pad comprises a bottom layer of chromium, a top layer of copper and an intermediate layer of phased chromium-copper. An intermetallic layer of CuSn forms if and when the solder is reflowed, in accordance with certain disclosed variations of the process. In all the variations, the solder is used as an etching mask in combination with several different etching techniques including electroetching, wet etching, anisotropic dry etching and ion beam etching.


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