Semiconductor integrated circuit having a dram cell unit and a

Abstract

A high density nonvolatilized semiconductor integrated circuit is comprised of a Dynamic RAM (DRAM) cell unit and a nonvolatile cell unit. The DRAM cell unit is comprised of a first transistor having its gate connected to a word line, its source connected to a bit line and its drain connected to a first capacitor. The first capacitor has its other electrode connected to a first line. The nonvolatile RAM cell unit is comprised of a second transistor having its gate connected to a second line, its source connected to the bit line and its drain connected to a second capacitor. The second capacitor has its other electrode connected to a third line. The second capacitor comprises a ferroelectric substance to which a reverse voltage is applied in order to read out its signal, and the first capacitor comprises a paraelectric substance to which such reverse voltage is not applied. The cycle life of the DRAM cell unit is thereby increased. Further, the composition of the integrated circuit having a smaller number of constituent elements allows high-density circuit formation.