The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 1993

Filed:

Feb. 11, 1991
Applicant:
Inventors:

Shuji Ikeda, Koganei-shi, Tokyo, JP;

Satoshi Meguro, Hinode-machi, JP;

Soichiro Hashiba, Hamura-machi, Nishitama-gun, Tokyo, JP;

Isamu Kuramoto, Higashiyamato-shi, Tokyo, JP;

Atsuyoshi Koike, Kokubunji-shi, Tokyo, JP;

Katsuro Sasaki, Fuchuu-shi, Tokyo, JP;

Koichiro Ishibashi, Sumida-ku, Tokyo, JP;

Toshiaki Yamanaka, Iruma-shi, Saitama, JP;

Naotaka Hashimoto, Hachioji-shi, Tokyo, JP;

Nobuyuki Moriwaki, Ukyo-ku, Kyoto-shi, Kyoto, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257385 ; 257903 ; 257 69 ; 365154 ;
Abstract

A MOSFET Static Random Access Memory (SRAM) cell has a symmetrical construction, with a pair of word lines. The word lines are in second level polysilicon, so that they may overlap the driving transistor gates which are in first level polysilicon.


Find Patent Forward Citations

Ikeda, Shuji. (1993). Sram with dual word lines overlapping drive transistor gates (U.S. Patent No. 5239196). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5239196

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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