The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 1993
Filed:
Aug. 28, 1992
Avishay Katz, Westfield, NJ (US);
Chien-Hsun Lee, North Plainfield, NJ (US);
King L Tai, Berkeley Heights, NJ (US);
AT&T Bell Laboratories, Murray Hill, NJ (US);
Abstract
One or more metallized chip terminals of an electronic device, such as an integrated circuit chip or a laser chip, in one embodiment are temporarily bonded to one or more metallized substrate pads of a wiring substrate, as for the purpose of electrically testing the electronic device. The composition of the metallized chip terminals is suitably different from that of the metallized substrate pads. The pads and terminals are aligned and electrically connected together with a solder located between them under pressure and a temperature above the melting point of the solder. The solder is cooled, and electrical tests of the electronic device are performed by means of electrical access from testing circuitry to the chip terminals through the substrate pads. Then the solder is heated again above its melting point while being immersed in a liquid flux, whereby the liquid solder wets the metallized chip terminals but not the metallized substrate pads, and the device is gently mechanically pulled away from the wiring substrate and is cooled thereafter. This substrate can thereafter be reused for testing other electronic devices that have similarly suitably metallized terminals. In another embodiment, testing can be performed or not as may be desired; and, as for the purpose of chip operation as an integrated circuit or laser, the chip can be allowed to remain permanently bonded to the substrate in the form of a heat-sinking or heat-spreading submount, or it can be allowed to remain only temporarily bonded to the submount and subsequently pulled away from the submount for the purpose of reuse of the submount for another chip.