The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 1993
Filed:
Jan. 02, 1992
Bernard W Ho, Fremont, CA (US);
Chartered Semiconductor Manufacturing, Singapore, SG;
Abstract
The method of manufacture of a PMOS integrated circuit having a feature size in the order of one micron or less is done by providing, on a silicon substrate, a pattern of silicon gate electrodes over a gate dielectric. Implanting of BF.sub.2 + ions and B11+ ions sequentially by using the pattern as a mask. The structure is annealed at more than about 850.degree. C. to complete the PMOS integrated circuit. This method results in lower contact resistance to the P+ regions and lower sheet resistance for higher speed CMOS integrated circuits at minimal increase of manufacturing cost.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile