The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 1993

Filed:

Apr. 17, 1991
Applicant:
Inventors:

Toru Kaga, Urawa, JP;

Shinichiro Kimura, Kunitachi, JP;

Katsutaka Kimura, Akishima, JP;

Yoshinobu Nakagome, Hachiouji, JP;

Digh Hisamoto, Kokubunji, JP;

Yoshifumi Kawamoto, Tsukui, JP;

Eiji Takeda, Koganei, JP;

Shimpei Iijima, Akishima, JP;

Tokuo Kure, Nishitama, JP;

Takashi Nishida, Taitou, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257306 ; 257308 ; 257384 ;
Abstract

The present invention concerns a semiconductor device having a low-resistivity wiring structure. Wirings formed directly on a hill and valley structure result in a thin portion and, in an extreme case, a disconnected portion. This increases the resistivity of wirings on the hill and valley structure and lowers the reliability of the connection. In a case where the wirings are data lines of a memory, with an increased effective length, the resistance and the parasitic capacitance of the data line is greater. The above mentioned problems have been solved by wirings which comprise at least two layers of conductive film including a first conductive film as a lower layer and a second conductive film as an upper layer, and the first conductive layer has a surface moderating or planarizing the hills and valleys in the underlying material.


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