The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 1993
Filed:
Nov. 15, 1991
Applicant:
Inventors:
Cheryl A Bollinger, Kutztown, PA (US);
Min-Liang Chen, Allentown, PA (US);
David P Favreau, Coopersburg, PA (US);
Kurt G Steiner, Bethlehem, PA (US);
Daniel J Vitkavage, Zionsville, PA (US);
Assignee:
AT&T Bell Laboratories, Murray Hill, NJ (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437180 ; 437228 ; 437238 ; 437240 ; 437186 ; 437978 ;
Abstract
Self-aligned contacts are formed to regions between closely spaced features by a method which uses differential etch rates between first and second dielectrics deposited over the closely spaced features.
Bollinger, Cheryl. (1993). Integrated circuit with planar dielectric layer (U.S. Patent No. 5200358). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5200358
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile