The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 1992

Filed:

Nov. 06, 1991
Applicant:
Inventors:

James Kardach, San Jose, CA (US);

Gregory Mathews, Cupertino, CA (US);

Cau Nguyen, Milpitas, CA (US);

Sung S Cho, Sunnyvale, CA (US);

Kameswaran Sivamani, Sunnyvale, CA (US);

David Vannier, Cupertino, CA (US);

Shing Wong, Cupertino, CA (US);

Edward Zager, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ; G06F / ;
U.S. Cl.
CPC ...
395650 ; 364D / ; 3642316 ; 3642632 ; 3642614 ; 364D / ; 3649314 ; 3649383 ; 36494205 ; 3649411 ; 36494811 ;
Abstract

A transparent system interrupt is invoked by the assertion of an electrical signal at an external pin of a microprocessor CPU chip. Upon assertion of this interrupt, the CPU begins program execution in a dedicated RAM area that is inaccessible both to the operating system and all application programs. A set of instructions, which may be unique to the system in which the CPU chip is installed, services the interrupt. Typically, the state of the CPU and associated components in the system immediately prior to assertion of the interrupt will be saved into the dedicated RAM area by the interrupt service routine. Recovery from the interrupt is accomplished upon recognition of an external event that invokes a RESUME instruction causing the CPU and associated components to be restored to exactly the same state that existed prior to the interrupt and in a manner entirely transparent to any program executing at the time of the interrupt.


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